1. Field of the Invention
This invention relates to a start circuit for a self-biasing constant current circuit, a constant current circuit and an operational amplifier using the start circuit, especially suitable for use in analog ASIC, for example.
2. Discussion of the Background
There is a great demand for on ASIC (Application Specific Integrated Circuit), which is an integrated circuit originally having standard circuit elements on a substrate and permitting the circuit arrangement to be freely modified according to a specific wiring design pursuant to a client's request. There are analog ASICs intended for analog circuits including logic circuits, constant current circuits, operational amplifiers, and so forth.
A constant current circuit with a high reliability is indispensable for stabilizing operations of an analog circuit.
A general construction of a conventional self-biasing constant circuit device is shown in FIG. 7 where a p-channel MOS transistor MP1 and an n-channel MOS transistor MN1 are connected in series between a power source V.sub.DD and the ground GND, and a p-channel MOS transistor MP2, resistor R1, and n-channel MOS transistor MN2 connected in series are connected in parallel with the transistors MP1 and MN1. The gate of the transistor MP1 and the gate of the transistor MP2 are commonly connected to a bias point VB. Connected between the common connected point and the drain of the transistor MP1 is a transistor MP3 whose gate is supplied with a power down signal PD.
The gate of the transistor MN1 is connected to the connection point of the drain of the transistor MN2 and the resistor R1, and the gate of the transistor MN2 is connected to the connection point of the drain of the transistor MP2 and the resistor R1.
Further provided are a transistor MP4 with the source connected to V.sub.DD and the drain connected to the gate common connection point and supplied to the gate with the signal PDB inverted from the power down signal, and a p-channel MOS transistor MP5 with the source connected to the power source V.sub.DD and the drain connected to a load-connected terminal T. Since the transistors MP1 and MP5 form a current mirror circuit, the current I1 flowing in the transistor MP1 and the current I2 flowing in the transistor MP5 are equal, and a constant current flows in the load connected between the load-connected terminal and the ground.
The transistor MP3 supplied with the power down signal PD to the gate and the transistor MP4 supplied to the gate with the signal PDB inverted from the power down signal behave as a switch for starting or stopping the operation of the constant current circuit.
Explained below are behaviors of the circuit. Let an appropriate load be connected to the load-connected terminal T.
In operation, the transistor MP3 is turned on with an "H" level signal applied as the power down signal PD to its gate, and the transistor MP4 is turned off with an "L" level signal applied to its gate. As a result, the transistors MP1, MP2 and MN2 are also turned on. It causes a current Ir to flow in the resistor R1, which in turn causes the current I1 to flow in the transistor MP1 and the current I2 to flow in the transistor MP5 paired with the transistor MP1 to form the current mirror.
On the other hand, in the inoperative state, since an "L" level signal is supplied as the power down signal PD and an "H" level signal as the signal PDB, the transistor MP3 is turned off and the transistor MP4 is turned on, which causes the bias potential VB to elevate to the source voltage V.sub.DD, and the transistors MP1 and MP2 are turned off, which results in no flow of the current through R1 and no flow of the constant current. In this state, the drain voltages of the transistors MP1, MP2 and MP3 are V.sub.SS.
However, since the drain voltages of the transistors MP1, MP2 and MP3 are V.sub.SS in the inoperative state, even when the circuit is changed to the operative state by turning the transistor MP3 on and MP4 off, the transistors MP1 and MP2 remain off, no current flows in the circuit, and the bias circuit does not function.
To overcome the problem, it has been proposed to connect a capacitor C1 between the power-down signal terminal PD and the bias point VB to use it as a start circuit and to use its capacitance for forcibly lowering the bias point.
However, in the start circuit in the conventional self-biasing constant current circuit shown in FIG. 8, since the bias point VB is connected to the part of V.sub.SS via the capacitor C1 in the operative state, noise, if any, contained in the power on the part of V.sub.SS may be contained in VB through the capacitor C1. In this case, the PSRR (Power Source Reduction Ratio) characteristic of the circuit, namely, the ratio of change in output voltage responsive to the source voltage, may deteriorate.
Moreover, when a number of gates or other capacities which apply loads are connected to the bias point, a large capacitance is required for reliably starting the circuit, which inevitably causes the capacitance to occupy a large area. For example, if the load is several times pF, then the capacitance of the capacitor must be several times the value, namely, as large as 20 pF, for example. Thus, the area occupied by the capacitor to ensure the capacitance becomes very large, and degrades the efficiency of the device in terms of its area.